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High Accuracy anyCAPTM Adjustable 200 mA Low Dropout Linear Regulator ADP3303A
FUNCTIONAL BLOCK DIAGRAM
ADP3303A
OUT CC FB Q2 SD BANDGAP REF DRIVER gm IN THERMAL PROTECTION Q1
FEATURES High Accuracy Over Line and Load: 0.8% @ +25 C, 1.4% Over Temperature Ultralow Dropout Voltage: 150 mV Typical @ 200 mA Requires Only CO = 1 F for Stability anyCAP = Stable with All Types of Capacitors (Including MLCC) Current and Thermal Limiting Low Noise Dropout Detector Low Shutdown Current: 1 A 3.2 V to 12 V Supply Range Adjustable 2.2 V to 10 V Output Range -20 C to +85 C Ambient Temperature Range Thermally Enhanced TSSOP-14 Package APPLICATIONS Cellular Telephones Notebook, Palmtop Computers Battery Powered Systems Portable Instruments Post Regulator for Switching Supplies Bar Code Scanners
ERR
GND
ERR
EOUT R3 330k VOUT = +5V R1 C2 1F
ADP3303A
VIN C1 0.47 F SD ON OFF SD IN OUT
FB GND R2
Figure 1. Typical Application Circuit
GENERAL DESCRIPTION
The ADP3303A is a member of the ADP330x family of precision low dropout anyCAP voltage regulators. The ADP3303A stands out from conventional LDOs with a novel architecture, an enhanced process and a new package. Its patented design requires only a 1 F output capacitor for stability. This device is insensitive to output capacitor ESR (Equivalent Series Resistance), and is stable with any good quality capacitor, including ceramic types (MLCC) for space restricted applications. The ADP3303A achieves exceptional accuracy of 0.8% at room temperature and 1.4% overall accuracy over temperature, line and load variations. The dropout voltage of the ADP3303A is only 150 mV (typical) at 200 mA.
In addition to the new architecture and process, ADI's new proprietary thermally enhanced package (Thermal Coastline) can handle 1 W of power dissipation without an external heat sink or large copper surface on the PC board. This keeps PC board real estate to a minimum and makes the ADP3303A very attractive for use in portable equipment. The ADP3303A operates over an input voltage range of 3.2 V to 12 V and delivers a load current in excess of 200 mA. The output voltage can be adjusted from 2.2 V to 10 V using an external resistor divider. It also features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overload protection is activated. Other features include shutdown and optional noise reduction capabilities.
anyCAP is a trademark of Analog Devices Inc.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1999
ADP3303A-SPECIFICATIONS noted)
Parameter OUTPUT VOLTAGE ACCURACY
2, 3, 4
(@ TA = -20 C to +85 C, VIN = 7 V, CIN = 0.47 F, COUT = 1 F, unless otherwise
1
Symbol VOUT
Conditions VIN = Nom VOUT +0.5 V to +12 V IL = 1.0 mA to 200 mA TA = +25C VIN = Nom VOUT +0.5 V to +12 V IL = 1.0 mA to 200 mA VIN = Nom VOUT +0.5 V to +12 V TA = +25C IL = 1.0 mA to 200 mA TA = +25C IL = 200 mA IL = 1.0 mA VIN = 2.5 V, VOUT = 5.0 V IL = 1.0 mA VOUT 98% of VO Nominal IL = 200 mA IL = 10 mA IL = 1 mA ON OFF 0 V < VSD 5 V 5 V VSD 12 V @ VIN = 12 V VSD = 0, VIN = 12 V TA = +25C VSD = 0 V, VIN = 12 V TA = +85C TA = +25C @ VIN = 12 V TA = +85C @ VIN = 12 V VEO = 5 V ISINK = 400 A VIN = Nom VOUT + 1 V f = 10 Hz-100 kHz CNR = 0 CNR = 10 nF, CL = 10 F
Min
Typ
Max
Units
-0.8 -1.4 0.01 0.005 2.0 0.35 1.9 0.15 0.02 0.003 2.0 0.9 0.9
+0.8 +1.4
% % mV/V mV/mA
LINE REGULATION LOAD REGULATION GROUND CURRENT
5
VO VIN VO IL IGND IGND VDROP
4 0.6 3.0 0.4 0.07 0.03 0.3 1 22 1 5 2.5 4 13
mA mA mA V V V V V A A A A A A A V mA V rms V rms
GROUND CURRENT5 IN DROPOUT DROPOUT VOLTAGE
SHUTDOWN THRESHOLD SHUTDOWN PIN INPUT CURRENT GROUND CURRENT IN5 SHUTDOWN MODE
VTHSD ISDIN IQ
OUTPUT CURRENT IN SHUTDOWN MODE ERROR PIN OUTPUT LEAKAGE ERROR PIN OUTPUT "LOW" VOLTAGE PEAK LOAD CURRENT OUTPUT NOISE @ 5 V OUTPUT
IOSD
IEL VEOL ILDPK VNOISE
0.15 300 100 30
0.3
NOTES 1 Ambient temperature of +85C corresponds to a typical junction temperature of +125C under typical full load test conditions. The formula for Nom V OUT is found in the Output Voltage Selection section. 2 Accuracy guaranteed using external trim pots. 3 For 2.7 V output, the minimum V IN is 3.2 V. 4 Guaranteed by design and characterization. 5 Ground currents include the current through R1, R2. Specifications subject to change without notice.
-2-
REV. A
ADP3303A
ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTIONS
Input Supply Voltage . . . . . . . . . . . . . . . . . . . -0.3 V to +16 V Shutdown Input Voltage . . . . . . . . . . . . . . . . -0.3 V to +16 V Error Flag Output Voltage . . . . . . . . . . . . . . . -0.3 V to +16 V Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . -0.3 V to +5 V Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited Operating Ambient Temperature Range . . . -55C to +125C Operation Junction Temperature Range . . . -55C to +125C JA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96C/W Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering 10 sec) . . . . . . . +300C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220C
*This is a stress rating only; operation beyond these limits can cause the device to be permanently damaged.
Pin 1-3 4&5
Mnemonic NC OUT
Function No Connect. Output of the Regulator. Bypass to ground with a 1 F or larger capacitor. Pins 4 and 5 must be connected together for proper operation. Feedback. Connect to an external resistor divider that sets the output voltage. Ground. Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, this pin should be connected to the input pin. Open Collector Output that goes low to indicate that the output is about to go out of regulation. Regulator Input. Pins 10 and 11 must be connected together for proper operation. No Connect.
6
FB
7 8
GND SD
Other Members of anyCAP Family 1
Model ADP3300 ADP3301 ADP3302 ADP3307 ADP3308 ADP3309
Output Current 50 mA 100 mA 100 mA 100 mA 50 mA 100 mA
Package Options2 SOT-23-6 SO-8 SO-8 SOT-23-6 SOT-23-5 SOT-23-5
9 Comments High Accuracy High Accuracy Dual Output High Accuracy High Accuracy High Accuracy
ERR
10 & 11 IN
12-14
NC
NOTES 1 See individual data sheets for detailed ordering information. 2 SO = Small Outline, SOT = Surface Mount Outline.
PIN CONFIGURATION
NC NC NC OUT OUT FB GND NC NC NC IN IN ERR SD
ADP3303A
TOP VIEW (Not to Scale)
NC = NO CONNECT
ORDERING GUIDE
Model ADP3303AARU-Reel
Voltage Output ADJ
Package Description Thin Shrink Small Outline Package (TSSOP)
Package Option TSSOP-14
NOTES All devices operate over the ambient temperature range of -20C to +85C. Contact the factory for the availability of other output voltage options.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3303A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
-3-
ADP3303A-Typical Performance Characteristics
3.30025 3.30000 VOUT = +3.3V 3.29975 3.29950 3.29925 I L = 200mA 3.29900 3.29875 3.29850 3.5 4 5 IL = 100mA I L = 0mA I L = 10mA
3.30025 3.30000 3.29975 3.29950 3.29925 3.29900 3.29875
VIN = +7V VOUT = +3.3V
GROUND CURRENT - A
2.0
VOUT = +3.3V I L = 0mA
OUTPUT VOLTAGE - Volts
OUTPUT VOLTAGE - Volts
1.6
1.2
0.8
0.4
6 7 8 9 10 11 12 13 14 15 16 INPUT VOLTAGE - Volts
0
20 40
60 80 100 120 140 160 180 200 OUTPUT LOAD - mA
0 0
2
4 6 8 10 12 INPUT VOLTAGE - Volts
14
16
Figure 2. Line Regulation: Output Voltage vs. Supply Voltage
Figure 3. Output Voltage vs. Load Current
Figure 4. Quiescent Current vs. Supply Voltage
2000 1800
0.2
3000 VIN = +7V 2500
A GROUND CURRENT -
0.1
GROUND CURRENT - A
OUTPUT VOLTAGE - %
1600 1400 1200 1000 800 600 400 200 0 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD - mA IL = 0 TO 200mA
0.0 I L = 0mA -0.1 -0.2
\
I L = 200mA 2000 1500 I L = 100mA 1000 500 0 -25 IL = 0mA
-0.3 -0.4 -45 -25 -5
15 35 55 75 95 115 135 TEMPERATURE - C
-5
15 35 55 75 95 TEMPERATURE - C
115 135
Figure 5. Quiescent Current vs. Load Current
Figure 6. Output Voltage Variation % vs. Temperature
Figure 7. Quiescent Current vs. Temperature
180
INPUT-OUTPUT VOLTAGE - Volts
5
INPUT-OUTPUT VOLTAGE - Volts
8.0 VOUT = +3.3V VIN 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 0 20 40 60 VSD = VIN OR +3V CL = 1 F RL = 16.5 VOUT = +3.3V 80 100 120 140 160 180 200 TIME - s VOUT
INPUT-OUTPUT VOLTAGE - mV
160 140 120 100 80 60 40 20 0 0 20 40 60 80 100 120 140 160 180 200 OUTPUT LOAD - mA
4
3
2 R L = 16.5 1
0
0
1
2 4 3 2 3 INPUT VOLTAGE - Volts
1
0
Figure 8. Dropout Voltage vs. Output Current
Figure 9. Power-Up/Power-Down
Figure 10. Power-Up Transient
-4-
REV. A
ADP3303A
5.02 VOUT = +5V 5.01 5.00 4.99 Volts 4.98 5.01 5.00 4.99 5k , 1 F LOAD 5.02 VOUT = +5V
3.310 VOUT = +3.3V 3.305
Volts
3.300 3.295 3.290
VOUT
Volts
25 , 1 F LOAD
4.98
CL = 1 F
mA
7.5 7.0 0 20 40
VIN 7.5 7.0 60 80 100 120 140 160 180 200 TIME - s 0
VIN
200 10
I (VOUT)
40 80 120 160 200 240 280 320 360 400 TIME - s
0
200
400 600 TIME - s
800
1000
Figure 11. Line Transient Response
Figure 12. Line Transient Response
Figure 13. Load Transient for 10 mA to 200 mA Pulse
3.310 VOUT = +3.3V 3.305
Volts
Volts
VIN = +7V 3.5 0 400 +3.3V VOUT
VIN = +7V 4 3 CL = 10 F, RL = 16.5 2
Volts
CL = 1 F, RL = 3.3k
+3.3V VOUT
3.300 3.295 3.290 200 I (VOUT)
VOUT
CL = 10 F
mA
CL = 10 F, RL = 3.3k
300 IOUT 200 100
1 0 5 3 0 0 40 SD
mA
10
0
0
200
400 600 TIME - s
800
1000
0
1
2 3 TIME - sec
4
5
80 120 TIME - s
160
200
Figure 14. Load Transient for 10 mA to 200 mA Pulse
Figure 15. Short Circuit Current
Figure 16. Turn On
4 3
C=1 F R = 16.5
0
ON +3.3V OUTPUT RIPPLE REJECTION - dB
V/ Hz
-10 -20 -30 -40 -50 -60
VOLTAGE NOISE SPECTRAL DENSITY -
2
a. 1 F, RL = 33k b. 1 F, RL = 16.5 c. 10 F, RL = 33k d. 10 F, RL = 16.5
VOUT = +3.3V b
10
0.47 F BYPASS PIN 7, 8 TO PIN3
VOUT = 5V, CL = 1 F, IL = 1mA, CNR = 0
1.0
VOUT = 3.3V, CL = 1 F, IL = 1mA, CNR = 0 VOUT = 2.2-5.0V, CL = 10 F, IL = 1mA, CNR = 10nF
Volts
VOUT 1 0 5 0 VSD 0 10 20 30 TIME - s 40 50
a c
d
-70 b d -80 -90 ac 100 1k 10k 100k FREQUENCY - Hz
0.1
-100 10
1M
10M
0.01 100
1k 10k FREQUENCY - Hz
100k
Figure 17. Turn Off
Figure 18. Power Supply Ripple Rejection
Figure 19. Output Noise Density
REV. A
-5-
ADP3303A
THEORY OF OPERATION
The new anyCAP LDO ADP3303A uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider consisting of R1 and R2, which is varied to provide the available output voltage options. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier.
INPUT Q1 COMPENSATION CAPACITOR PTAT VOS R4 OUTPUT ATTENUATION (VBANDGAP/VOUT) R3 D1 R1 CLOAD (a) RLOAD R2
noise rejection and very high regulator gain, which leads to excellent line and load regulation. An impressive 1.4% accuracy is guaranteed over line, load and temperature. Additional features of the circuit include current limit, thermal shutdown and noise reduction. Compared to standard solutions that give warning after the output has lost regulation, the ADP3303A provides improved system performance by enabling the ERR Pin to give warning before the device loses regulation. As the chip's temperature rises above 165C, the circuit activates a soft thermal shutdown, indicated by a signal low on the ERR Pin, to reduce the current to a safe level.
APPLICATION INFORMATION
NONINVERTING WIDEBAND DRIVER
gm
PTAT CURRENT
ADP3303A
The ADP3303A is very easy to use. The only external component required for stability is a small 1 F bypass capacitor on the output. If the shutdown feature is not used, the shutdown pin (Pin 8) should be tied to the input pin.
CAPACITOR SELECTION
GND
Figure 20. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The amplifier is constructed in such a way that at equilibrium it produces a large, temperature proportional input "offset voltage" that is repeatable and very well controlled. The temperatureproportional offset voltage is combined with the complementary diode voltage to form a "virtual bandgap" voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources that leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by the diode D1, and a second divider consisting of R3 and R4, the values are chosen to produce a temperature stable output. This unique arrangement specifically corrects for the loading of the divider so that the error resulting from base current loading in conventional circuits is avoided. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type and ESR of the load capacitance. Most LDOs place strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value, required to keep conventional LDOs stable, changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. This is no longer true with the ADP3303A anyCAP LDO. It can be used with virtually any capacitor, with no constraint on the minimum ESR. The innovative design allows the circuit to be stable with just a small 1 F capacitor on the output. Additional advantages of the pole splitting scheme include superior line -6-
Bypass Capacitor (C1): connecting a 0.47 F capacitor from the IN pins (Pins 10 and 11) to ground greatly improves its line transient response and reduces the circuit's sensitivity to PC board layout. A larger capacitor could be used if line transients of longer duration are expected. Output Capacitor (C2): as will all members of the anyCAP low dropout regulator family, the ADP3303A is stable with any type of output capacitor down to zero ESR. A small 1 F output capacitor is required for stability. Larger capacitors with low ESR are recommended for improved load transient response. For space limited applications, Multilayer Ceramic Capacitors (MLCC) are a good choice. For low temperature operations OS-CON capacitors offer better performance. Noise Reduction Capacitor (CNR): to reduce the ADP3303A's low output noise by 6 dB-10 dB, a noise gain limiting capacitor can be connected between the feedback (FB) pin (Pin 6) and the OUT pins as shown in Figure 21. Low leakage capacitors in the 100 pF-500 pF range provide the best performance. Larger capacitors will slow down the output transient response. CNR is not needed in low noise applications where fast load transients are not expected.
9
ERR R3 330k VOUT = +5V R1 CNR 1F
ADP3303A
11 4
VIN C1
10
IN
OUT
5
FB 6 SD
8 7
R2
GND
Figure 21. Noise Reduction Circuit
OUTPUT VOLTAGE SELECTION
The ADP3303A is characterized by having the output voltage divider placed externally. The output voltage will be divided by R1 and R2 and fed back to the FB pin. In order to have the lowest possible sensitivity of output voltage versus any temperature variation, it is important that the parallel resistance of R1 and R2 is always 44 k.
REV. A
ADP3303A
The proper formula to compute R1 and R2 is: R1 = 44 k xVSEL 44 k , R2 = 1.189 1.189 1- V SEL
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATION
The rate at which heat is transferred is directly proportional to the temperature differential between the die and PC board. Once heat is transferred to the PC board, it should be dissipated to the air or other medium. Surface mount components rely on the conductive traces or pads to transfer heat away from the device. Appropriate PC board layout technique should be used to remove heat from immediate vicinity of the package. The following general guidelines will be helpful when designing a board layout: 1. PC board traces with larger cross section areas will remove more heat. For optimum results, use PC's with thicker copper and or wider traces. 2. Increase the surface area exposed to open air so heat can be removed by convection or forced air flow. 3. Do not solder mask or silk screen the heat dissipating traces. Black anodizing will significantly improve heat reduction by means of increased radiation. Figure 22 shows the recommended board layout for the ADP3303A. Although it is not critical, make sure R1 is connected right at the pin or the point you want to regulate in order to realize a proper kelvin connection. This will improve overall precision and stability. The same consideration is valid for the R2 connection to the ground pin, but a short connection is strongly suggested. No other components can be connected to the FB pin except an optional 10 nF-100 nF capacitor (CNR) in parallel to R1 that serves as a noise reduction capacitor.
SHUTDOWN MODE
Where VSEL is the desired output voltage. The output voltage can be selected from 2.2 V to 10 V. R1 is connected from the OUT pin to the FB pin and R2 is connected from the FB pin to GND. As an example, the Feedback Resistor Selection Table shows the feedback resistor values for 3 V and 5 V output voltages.
Table I. Feedback Resistor Selection Table
VOUT 3V 5V
R1 (1% Resistor) 110 k 187 k
R2 (1% Resistor) 73.2 k 57.6 k
OUTPUT CURRENT LIMITING
Short circuit protection is provided by limiting the pass transistors base drive current. Maximum output current is limited to 200 mA.
THERMAL OVERLOAD PROTECTION
The ADP3303A is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165C. Under extreme conditions (i.e., high ambient temperature and power dissipation), where die temperature starts to rise above 165C, the output current is reduced until the die temperature has dropped to a safe level. The output current is restored when the die temperature is reduced. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed 125C.
CALCULATING JUNCTION TEMPERATURE
Applying a TTL high signal to the shutdown pin, or tying it to the input pin, will turn the output ON. Pulling the shutdown pin down to 0.3 V or below, or tying it to ground, will turn the output OFF. In shutdown mode, quiescent current is reduced to less than 1 A.
INPUT-OUTPUT DROPOUT VOLTAGE AND DROPOUT DETECTOR
Device power dissipation is calculated as follows: PD = (VIN - VOUT) ILOAD + (VIN) IGND Where ILOAD and IGND are load current and ground current, VIN and VOUT are input and output voltages, respectively. Assuming ILOAD = 200 mA, IGND = 4 mA, VIN = 5.5 V and VOUT = 3.0 V, device power dissipation is: PD = (5.5 V - 3.0 V ) 0.2 + 5.5 x 0.004 = 0.522 W The proprietary thermal coastline TSSOP-14 package of the ADP3303A, in conjunction with the recommended PCB layout shown in Figure 21, yields a thermal resistance of 96C/W. As a result, the die temperature rise for the example circuit is: T = TJ - TA = PD x JA = 0.522 x 96 = 50.1C If the maximum ambient temperature is 50C, this yields a maximum junction temperature of TJMAX = 100.1C, which is below the 125C maximum operating junction temperature rating.
The ADP3303A maintains a regulated output with an input voltage as low as 150 mV above the nominal output voltage. Input voltage falling below this level will generate an error signal indicating that the error amplifier output is reaching its saturated state and will not be able to drive the pass transistor any harder. Lowering the input voltage any further will result in output voltage reduction and loss of regulation. The input voltage threshold which generates the error output signal depends on the load current. At the rated output current, it is slightly lower than the nominal output voltage plus the dropout voltage. However, the threshold is much lower at lighter loads.
APPLICATION CIRCUITS Crossover Switch
The circuit in Figure 23 shows that two ADP3303As can be used to form a mixed supply voltage system. The output switches between two different levels selected by an external digital input. Output voltages can be any combination of voltages from the Ordering Guide.
REV. A
-7-
ADP3303A
Higher Output Current
The ADP3303A can source up to 200 mA without any heatsink or pass transistor. If higher current is needed, an appropriate pass transistor can be used, as in Figure 24, to increase the output current to 1 A.
Constant Dropout Post Regulator
VIN = 5.5V TO 12V OUTPUT SELECT
5V 0V
IN
OUT
VOUT = 5V/3V 187k
ADP3303A
SD GND FB
57.6k
The circuit in Figure 25 provides high precision with low dropout for any regulated output voltage. It significantly reduces the ripple from a switching regulator while providing a constant dropout voltage, which limits the power dissipation of the LDO to 60 mW. The ADP3000 used in this circuit is a switching regulator in the step-up configuration.
TOP OF THE BOARD 10mm BOTTOM OF THE BOARD 10mm
IN C1 1.0 F SD
OUT
ADP3303A
FB GND
110k
C2 1.0 F
73.2k
Figure 23. Crossover Switch
VIN = 6V TO 8V C1 47 F MJE253* R1 50 VOUT = 5V @ 1A
IN
OUT C2 10 F 187k
ADP3303A
SD GND *AAVOD531002 HEAT SINK IS USED FB ERR
57.6k
DRAWINGS NOT TO SCALE
Figure 22. ADP3303A (TSSOP-14) Recommended Board Layout
L1 6.8 H VIN = 2.5V TO 3.5V C1 100 F 10V D1 1N5817
Figure 24. High Output Current Linear Regulator
ADP3303A
IN OUT FB 3.3V @ 160mA R5 121k R6 68.1k C2 100 F 10V
R1 120 ILIM VIN
SD R2 30.1k 1%
GND
C3 2.2 F
SW1 Q1 2N3906 FB R3 124k 1% Q2 2N3906 R4 274k
ADP3000-ADJ
GND SW2
Figure 25. Constant Dropout Post Regulator
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm). PRINTED IN U.S.A.
14-Lead Thin Shrink Small Outline Package (TSSOP) (RU-14)
0.201 (5.10) 0.193 (4.90)
14 8
0.177 (4.50) 0.169 (4.30)
1 7
0.256 (6.50) 0.246 (6.25)
PIN 1 0.006 (0.15) 0.002 (0.05) 0.0433 (1.10) MAX 0.0256 (0.65) BSC 0.0118 (0.30) 0.0075 (0.19) 0.0079 (0.20) 0.0035 (0.090)
SEATING PLANE
8 0
0.028 (0.70) 0.020 (0.50)
-8-
REV. A
C3328a-2-7/99
10mm


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